NEET 2021 Physics Question 39 Solution

Analyze the logic gate circuit: - Gate 1 is an AND gate with inputs $A$ and $B$, giving output $Y_1 = A \cdot B$. - Gate 2 is a NAND gate with inputs $B$ and $C$, giving output $Y_2 = \overline{B \cdot C}$. - Gate 3 is an OR gate combining $Y_1$ and $Y_2$:

Construct the interval-by-interval digital truth table from the provided waveforms ($5\text{ V} \equiv 1$, $0\text{ V} \equiv 0$): - $0 < t < t_1$: $A = 0, B = 0, C = 1 \implies Y_1 = 0, Y_2 = \overline{0} = 1 \implies y = 0 + 1 = 1$ ($5\text{ V}$) - $t_1 < t < t_2$: $A = 1, B = 0, C = 1 \implies Y_1 = 0, Y_2 = \overline{0} = 1 \implies y = 0 + 1 = 1$ ($5\text{ V}$) - $t_2 < t < t_3$: $A = 0, B = 1, C = 0 \implies Y_1 = 0, Y_2 = \overline{0} = 1 \implies y = 0 + 1 = 1$ ($5\text{ V}$) - $t_3 < t < t_4$: $A = 1, B = 1, C = 0 \implies Y_1 = 1, Y_2 = \overline{0} = 1 \implies y = 1 + 1 = 1$ ($5\text{ V}$) - $t_4 < t < t_5$: $A = 0, B = 0, C = 1 \implies Y_1 = 0, Y_2 = \overline{0} = 1 \implies y = 0 + 1 = 1$ ($5\text{ V}$) - $t_5 < t < t_6$: $A = 1, B = 0, C = 1 \implies Y_1 = 0, Y_2 = \overline{0} = 1 \implies y = 0 + 1 = 1$ ($5\text{ V}$) - $t > t_6$: $A = 0, B = 0, C = 1 \implies Y_1 = 0, Y_2 = \overline{0} = 1 \implies y = 0 + 1 = 1$ ($5\text{ V}$)

The output $y$ is logic high ($5\text{ V}$) uniformly throughout all time intervals, corresponding to the straight horizontal line at $5\text{ V}$ in Graph (3).